Minima Processor Joins ESD Alliance
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Minima Processor Joins ESD Alliance

Ultra Low-Power IP Provider Brings International Perspective, Deep Understanding of Emerging Markets

REDWOOD CITY, CALIF. – January 23, 2018  –   Minima Processor of Oulu, Finland, provider of near-threshold voltage design solutions that employ dynamic margining and ultra-wide dynamic voltage and frequency scaling (DVFS) to minimize energy consumption in system-on-chip (SoC) designs, today joined the Electronic System Design Alliance (ESD Alliance).

As an international association of companies providing goods and services throughout the semiconductor design ecosystem, the ESD Alliance welcomes Minima Processor and values the contribution it will add. “Minima brings an international perspective to the organization as well as a deep understanding into emerging markets, such as IoT,” notes Bob Smith, executive director of the ESD Alliance. “We welcome Minima to our member company list and expect to offer assistance as it as it launches its product line and moves into the U.S. marketplace.” Intended for a range of markets, including microcontroller, internet of things (IoT), in-body medical and connectivity, the Minima dynamic-margining approach is a unique, patented intellectual-property (IP)-based methodology for near-threshold voltage design. It combines hardware and software to enable circuits to function at their lowest possible power for any given task, data or ambient condition.

“The ESD Alliance has a well-deserved reputation for assisting small startups with a range of programs, including the MSS reports, import/export regulations and license management working groups,” comments Toni Soini, Minima’s chief executive officer. “Joining was an easy decision for us and we look forward to engaging with these programs as we build our global presence.”

About Minima Processor

Minima Processor of Oulu, Finland, provides near-threshold voltage design solutions that employ dynamic margining and ultra-wide dynamic voltage and frequency scaling (DVFS) to minimize energy consumption in system-on-chip (SoC) designs. The Minima margining approach is a unique intellectual-property (IP)-based methodology for near-threshold voltage design that combines hardware and software to enable circuits to function at their lowest possible power for any given task, data or ambient condition. Founded in 2016 by seasoned technical and R&D professionals with expertise in energy-efficiency technology, it is privately held and funded by Aalto University, CFT Nordic Investment Center, Lifeline Ventures, VTT Ventures, and angel investors. Minima is a founding member of the RISC-V Foundation.



Contact:

Nanette Collins
Public Relations for the ESD Alliance
(617) 437-1822
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