The Variation Designer solution provides an efficient way for chip designers to analyze, identify and fix the effects of process variations on their designs. It provides automatic capabilities to analyze and identify process variation-related failure mechanisms, but cedes control to designers to use the information in combination with their experience and knowledge to fix those problems in an interactive manner. The new solution strengthens Solido’s global position as an industry leader in process variation solutions for transistor-level design.
Scalable and Extensible
Variation Designer is the most recent version of Solido’s EDA (electronic design automation) tools, and was developed through intense and detailed interaction with major Solido customers. It is a highly flexible solution upon which a variety of applications can be deployed to solve current and future process variation challenges.
In conjunction with Variation Designer, Solido has released seven statistical variation applications. The statistical variation applications utilize a systematic and consistent True Corner™-based design methodology. This flow extends the familiar digital corner-based design methodology to account for process variation effects. True Corners account for global, local (mismatch) and environmental variations for a specific design, and accurately represent the manufacturing and operating variance that a design is subjected to. The released applications include such functionalities as Latin hypercube sampling and run-time feedback, corner discovery, statistical sweep/sensitivity analysis and high-sigma verification. Other applications, including additional ones for statistical variation effects and well proximity effects, will be made available in the future.
Variation Designer is extremely scalable and is able to handle the high-capacity requirements imposed by large circuits with thousands of active devices. It has been tightly integrated with the Cadence ADE (Analog Design Environment) and Spectre, and the Synopsys HSPICE, design flows, and will also support other design flows in the near future, including custom flows.
“We’re very pleased that our customers engaged in a full review of our first-generation solution and enthusiastically participated in the specification that has now become our latest process variation solution,” said Amit Gupta, President and CEO of Solido Design Automation. “With their invaluable feedback and input, we’ve realized our vision of launching an extensible, scalable process variation solution for nanometer transistor-level designers. We look forward to deploying Variation Designer and proliferating high-value applications that will solve critical process variation problems at advanced technology nodes.”
“Resolving process variation issues is becoming an increasingly important challenge in nanometer transistor-level designs,” said Mary A. Olsson, Gary Smith EDA. “Solutions that can scale to handle large inter-related design and process data, and are flexible enough to allow rapid adaptation to new challenges, are much needed and will help drive the development of robust, cost-effective nanometer designs.”
Variation Designer and the initial seven statistical variation applications are now available from Solido Design Automation.
About Solido Design Automation
Solido Design Automation Inc. provides process variation solutions for nanometer transistor-level designers of analog/mixed-signal, custom digital, and memory integrated circuits. The privately held company is venture capital funded and has offices in the U.S.A., Canada, Japan and Europe. For further information, visit www.solidodesign.com or call 306-382-4100.
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