Xilinx and Micron Demonstrate Industry's First Hardware Interoperability of FPGA and RLDRAM 3 Memory Interface Standard

Xilinx 7 Series FPGA/Micron RLDRAM 3 Platform Enables Substantially Higher Data Rates for 40G and 100G Networking Systems

SAN JOSE, Calif., and BOISE, Idaho, March 13, 2012 — (PRNewswire) —  Xilinx, Inc. (NASDAQ: XLNX) and Micron Technology, Inc. (Nasdaq: MU), today announced the first public hardware demonstration of an FPGA interfacing with RLDRAM 3 memory, a new and emerging memory standard for high-end networking applications such as packet buffering and inspection, linked lists, and lookup tables. Operating with Virtex®-7 and Kintex™-7 FPGAs at data rates up to 1600 megabits per second (Mb/s), Micron's high-performance RLDRAM 3 memory combines high density, high bandwidth and fast SRAM-like random access to enable a 60 percent higher data rate and memory bandwidth compared to that of the previous generation (Virtex-6 FPGAs/RLDRAM2 memory standard). RLDRAM 3 memory enables 40G and 100G networking systems that require higher speed, higher density, lower power and lower latency.

Virtex-7 and Kintex-7 FPGAs are designed with the necessary IO standards and architectural components for optimal interfacing with RLDRAM 3, providing a significant boost to system performance for high-performance wireless and wired networking systems. RLDRAM 3 memory uses innovative circuit design to minimize the time between the beginning of an access cycle and the instant that the first data is available. Ultra-low bus turnaround time enables higher sustainable bandwidth with near-term balanced read-to-write ratios.

"The new RLDRAM 3 interface is ideal for Xilinx and Micron's mutual customers in the high-end networking space who require higher speed, higher density, lower power and lower latency," said Derek Curd, technical marketing manager at Xilinx. "The RLDRAM 3 hardware demonstration shows how we're able to achieve a much more efficient transfer of network data."

A video of the new Virtex-7 FPGA and Micron RLDRAM 3 memory interface solution from Xilinx and Micron can be viewed at: www.xilinx.com/products/technology/memory-solutions/ or micronblogs.com.

"Xilinx has been a longtime partner of Micron, going back to the early definition efforts of RLDRAM 3 memory," said Robert Feurle, vice president of Micron's DRAM marketing. "Together, we welcome the ability to demonstrate and deliver performance advantages of RLDRAM 3 with the latest Virtex-7 and Kintex-7 families."

Availability/Ordering Information

Hardware demonstrations of the Xilinx RLDRAM 3 Memory interface IP core are available now with user configurable IP cores available in ISE® Design Suite 13.4 in September 2012. Qualified Micron RLDRAM 3 memory devices are available now in x18 and x36 organizations across all speed grades from 800 to 1066MHz.  For complete information visit: micron.com/rldram.

About Micron

Micron Technology, Inc. is one of the world's leading providers of advanced semiconductor solutions. Through its worldwide operations, Micron manufactures and markets a full range of DRAM, NAND and NOR flash memory, as well as other innovative memory technologies, packaging solutions and semiconductor systems for use in leading-edge computing, consumer, networking, embedded and mobile products. Micron's common stock is traded on the NASDAQ under the MU symbol. To learn more about Micron Technology, Inc., visit micron.com.

About Xilinx

Xilinx is the world's leading provider of programmable platforms. For more information, visit: xilinx.com.

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Xilinx, the Xilinx logo, Artix, ISE, Kintex, Spartan, Virtex, Zynq, and other designated brands included herein are trademarks of Xilinx in the United States and other countries. Micron and RLDRAM are trademarks of Micron Technology, Inc. All other trademarks are the property of their respective owners.

Bruce Fienberg
Xilinx
408-879-4631
Email Contact

Mary Ellen Ynes
Zeno Group for Micron
650-801-7954
Email Contact

SOURCE Xilinx, Inc.

Contact:
Xilinx, Inc.
Micron Technology, Inc.
Web: http://www.xilinx.com

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