Xilinx Multiplies Productivity with Vivado Design Suite 2012.3

New multithreaded place and route, and reference designs accelerate time to implementation of All Programmable 7 series FPGAs

SAN JOSE, Calif., Oct. 23, 2012 — (PRNewswire) — �Xilinx, Inc. (NASDAQ: XLNX) today announced the immediate availability of Vivado™ Design Suite 2012.3, offering for the first time new productivity enhancements for customers running the tools on multi-core processor workstations as well as new reference designs for speeding design implementation.

"We continue to focus on all aspects of our customers' productivity with each new release of Xilinx's next generation design environment," said Tom Feist, Xilinx's senior marketing director of design methodology. "With Xilinx's massive All Programmable 3D ICs with up to 2,000,000 logic cells in mind, reducing runtime for our customers is just one of the many ways the Vivado Design Suite is a generation ahead in helping designers get their products to market faster."

Since its debut in April, the Vivado Design Suite has been accelerating time to implementation from C and RTL by up to 4x for complex designs, while improving performance with up to 1 speed grade advantage over the ISE® Design Suite and up to 3 speed grades over competing devices. Thanks to new multithreaded place and route technology, the latest release in the landmark rollout of Xilinx's next generation design environment accelerates productivity even further on multi-core workstations with 1.3x faster runtimes on a dual-core processor and 1.6x faster runtimes on a quad-core.

All Programmable 7 Series FPGA Targeted Reference Designs

The release of Vivado Design Suite 2012.3 extends Xilinx's portfolio of Targeted Reference Designs (TRD) supporting Kintex™-7 and Virtex®-7 All Programmable FPGAs to accelerate designer productivity even further. TRDs deliver a pre-verified, performance-optimized infrastructure design that a designer can modify and scale to suit their custom needs.

  • The Kintex-7 FPGA Base TRD showcases the capabilities of Kintex-7 FPGAs through a fully-integrated PCIe® design that delivers 10 Gb/s performance end-to-end using performance-optimized DMA engine and DDR3 memory controller.
  • The Kintex-7 FPGA Connectivity TRD delivers up to 20 Gb/s of performance per direction featuring a dual Network Interface Card (NIC) with a Gen2 x8 PCIe endpoint, a multi-channel packet DMA, DDR3 memory for buffering, 10G Ethernet MAC, and 10GBASE-R standard compatible physical layer interface.
  • The Kintex-7 FPGA Embedded TRD offers a comprehensive processor subsystem complete with GbE, DDR3 memory controller, display controller, and other standard processor peripherals.
  • The Kintex-7 FPGA DSP TRD includes a high-speed analog interface with digital up / down conversion overclocked to run at 491.52 MHz.

Availability

Vivado Design Suite, Design Edition is available at no additional cost to in warranty ISE Design Suite Logic Edition and Embedded Edition customers, and Vivado Design Suite System Edition with Vivado High-Level Synthesis is available at no additional cost to ISE Design Suite DSP and System Edition customers.

Please visit www.xilinx.com to download the latest version of the ISE Design Suite and Vivado Design Suite. Customers can now also sign up for or view online training for Vivado Design Suite.

About Xilinx

Xilinx is the world's leading provider of All Programmable FPGAs, SoCs and 3D ICs. These industry-leading devices are coupled with a next-generation design environment and IP to serve a broad range of customer needs, from programmable logic to programmable systems integration. For more information, visit www.xilinx.com.

#1276p

Xilinx, the Xilinx logo, Artix, ISE, Kintex, Spartan, Virtex, Zynq, Vivado and other designated brands included herein are trademarks of Xilinx in the United States and other countries. PCI, PCIe and PCI Express are trademarks of PCI-SIG and used under license. All other trademarks are the property of their respective owners.

Xilinx

Bruce Fienberg

408-879-4631

Bruce.Fienberg@xilinx.com


 

SOURCE Xilinx, Inc.

Contact:
Xilinx, Inc.
Web: http://www.xilinx.com

Featured Video
Editorial
Jobs
Manufacturing Test Engineer for Google at Prague, Czechia, Czech Republic
Mechanical Engineer 3 for Lam Research at Fremont, California
Mechanical Engineer 2 for Lam Research at Fremont, California
Mechanical Manufacturing Engineering Manager for Google at Sunnyvale, California
Equipment Engineer, Raxium for Google at Fremont, California
Senior Principal Mechanical Engineer for General Dynamics Mission Systems at Canonsburg, Pennsylvania
Upcoming Events
Formnext 2024 - Additive Manufacturing (AM) and industrial 3D Printing at Messe Frankfurt, Messeparkhaus Rebstock, 60327 Frankfurt am Main Frankfurt Germany - Nov 19 - 22, 2024
Celebrate Manufacturing Excellence at Anaheim Convention Center Anaheim CA - Feb 4 - 6, 2025
3DEXPERIENCE World 2025 at George R. Brown Convention Center Houston TX - Feb 23 - 26, 2025
TIMTOS 2025 at Nangang Exhibition Center Hall 1 & 2 (TaiNEX 1 & 2) TWTC Hall Taipei Taiwan - Mar 3 - 8, 2025



© 2024 Internet Business Systems, Inc.
670 Aberdeen Way, Milpitas, CA 95035
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering EDACafe - Electronic Design Automation GISCafe - Geographical Information Services TechJobsCafe - Technical Jobs and Resumes ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise