"SystemC has come a long way in the past decade, growing into a foundation for modern system design environment that is used by thousands of design engineers worldwide," said Shishpal Rawat, Accellera chair. "The PoC simulator has been a substantial part of that market growth, and Andy Goodrich has kept the PoC simulator current and available to the design community. His efforts have directly led to the widespread industrial adoption that SystemC now enjoys, and the commercial toolset that has grown around it."
"If not for a decade of continuous effort on Andy's part, the SystemC PoC simulator would not be the industrial-strength design tool that it is today," said Philipp A. Hartmann, chair of the SystemC LWG and senior researcher at OFFIS. "He is a vital contributor to the SystemC LWG, explaining how things work, maintaining a high implementation quality, and demonstrating and reviewing the feasibility of proposals while collaborating with competitors to further the SystemC standard and methodology. This work has been absolutely essential to the standardization, adoption and growth of SystemC."
"I'm honored to accept this prestigious and distinctive award that not only represents the technical merit of what the SystemC LWG has achieved, but also the impact SystemC has had in the industry," acknowledged Andy Goodrich. "It has been my privilege to work within a standards environment that epitomizes the tenants of collaboration, technical excellence, hard work and dedication expressed by its committee and chairs. I accept this award not only for myself, but on behalf of the talented members of the LWG that toiled beside me to make SystemC the well adopted design language it is today."
Andy Goodrich serves as the vice chair of the SystemC LWG and is a primary developer of the SystemC PoC simulator. Since 2002 he has maintained the code repository to merge contributions and prepare the final test and release procedures for the version 2.2.0 and 2.3.0 public releases. During the standardization efforts for IEEE 1666-2005 and IEEE 1666-2011, he made numerous implementation changes and bug fixes which resulted in high quality IEEE standards. He also ensured that a companion PoC implementation was made available to the industry when standards were released.
Mr. Goodrich is a Senior Member of Consulting Staff at Cadence Design Systems, working on the development of high-level synthesis tools. He has over 40 years of engineering, research and management experience in hardware architecture, computer graphics, networking and operating systems in both industrial and academic settings.
From 1998 to 2014, Mr. Goodrich was a co-founder and early VP of engineering of Forte Design Systems. He subsequently was named a Fellow and worked on the development of Forte's suite of high-level synthesis tools. Mr. Goodrich has held several key technical engineering positions at IXMICRO, Parallax Graphics, RasterOps the University of Michigan, Ramtek and Hewlett-Packard. He holds a Bachelor's degree and a Master's degree in Computer Science from the University of Michigan.
About the Accellera Technical Committee
Accellera's Technical Committee oversees 14 Working Groups that produce effective and efficient Electronic Design Automation (EDA) and Intellectual Property (IP) standards for today's advanced IC designs. Participants include member companies and industry contributors. Technical contributors typically have many years of practical experience with IC design and developing and using EDA tools. For a list of Accellera Working Groups, please
click here.
About Accellera Systems Initiative
Accellera Systems Initiative (Accellera) is an independent, not-for profit organization dedicated to creating design and verification standards required by systems, semiconductor, intellectual property (IP) and electronic design automation (EDA) companies. The organization accelerates the development of standards that increase designer productivity and lower the cost of product development. As part of its ongoing partnership with the IEEE, standards developed by Accellera are contributed to the IEEE Standards Association for formal standardization and ongoing governance. For more information, visit
www.accellera.org. For membership information,
click here.
About DVCon
DVCon is the premier conference and exhibition for discussion of the functional design and verification of electronic systems. DVCon is sponsored by Accellera Systems Initiative, an organization focused on the creation and adoption of EDA and IP standards. For more information, please visit
www.accellera.org. For more information about DVCon, please visit
www.dvcon.org. Follow @dvcon on Twitter or to comment, please use #dvcon.
Accellera, Accellera Systems Initiative and SystemC are trademarks Accellera Systems Initiative Inc. All other trademarks and trade names are the property of their respective owners.
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For more information, contact: Jill Jacobs Public Relations for Accellera Systems Initiative Phone: +1 408 505 6017 Email: Email Contact
