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Technical Sessions and Demonstrations
June 2-4, 2014 from 9:00am-6:00pm at Booth #1521
Session 01:
Quick Intro to SCE-MI
Session 02:
OSVVM: Advanced Verification for VHDL with Synthworks
Session 03:
SoC Emulation Made Easy
Session 04:
Visual Mapping: GPS for UVM Journey
Session 05:
High Level Synthesis with NEC
Session 06:
Requirements-Based Verification
Session 07:
Design Rule Checks in FPGA design
Session 08:
Prototyping over 100M Gates
Session 09:
Ask Aldec: Demos, Roadmaps, Partners, Q&A, etc.
1-on-1 Sessions fill up quickly.
Visit
http://www.aldec.com/dac2014
to register. Choose one or more sessions and schedule a time that is convenient for you.
Aldec, Inc., headquartered in Henderson, Nevada, is a global industry leader in Electronic Design Verification and offers a patented technology suite including: RTL Design, RTL Simulators, Hardware-Assisted Verification, SoC and ASIC Prototyping, Design Rule Checking, IP Cores, Requirements Lifecycle Management, DO-254 Functional Verification and Military/Aerospace solutions.
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