Automated, Targeted Solutions
Fully automatic, targeted verification solutions deliver a substantial increase in verification efficacy, saving many man-months of engineering time and saving costly respins. They enable complete and accurate verification of specific design aspects that are difficult or impossible to verify using other verification methods. Questa PropGen is the newest member of this portfolio of solutions, which helps verification teams achieve higher quality in complex SoCs by automating the process of assertion-based verification (ABV).
"Mentor's formal technologies augment our traditional verification flow in many areas," said NamDo Kim, principal engineer, System LSI Division, Samsung Semiconductor, Inc. "We have successfully deployed the wide range of Questa applications from fully automatic formal to property checking to improve productivity and design quality."
Traditionally, verification engineers have relied on designers to be motivated to add assertions to their code. Unfortunately, the effort and time required by the designers to write these assertions often prevents designers from creating the assertions that the verification team needs to be successful. Questa PropGen puts the verification team in the driver's seat by enabling them to generate properties automatically using their existing test environments. With the Questa PropGen tool, project teams can experience all the benefits of ABV in their SoC simulation and emulation environments, without the need for time-consuming, manual coding of assertions.
Questa Formal Engines Leap Forward in Performance and Capacity
Questa Formal's ground-breaking new formal engines offer industry-leading performance on tough verification problems. These engines provide the power behind the Questa product's suite of fully automatic formal solutions and formal powered applications. Enhancements to the Questa Formal engines are enabling performance improvements across the family of automated solutions including an impressive 6x boost in Questa CDC, the industry defacto standard solution for clock-domain crossing (CDC) signoff. To complement the full range of verification technologies, Questa Formal solutions and engines are also tightly integrated with both simulation and emulation within the recently announced Mentor Enterprise Verification Platform to provide verification teams the ability to achieve their total verification goals more efficiently with higher levels of quality.
"Formal verification is moving to the mainstream and the technology continues to evolve at a rapid pace," said Vigyan Singhal, president and CEO, Oski Technology. "We are very impressed with the results we have seen with the newly released Questa Formal engines. In customer projects we have seen a dramatic boost in capacity, broadening the scope of problems that can be addressed."
About Mentor Graphics
Mentor Graphics Corporation is a world leader in electronic hardware and software design solutions, providing products, consulting services and award-winning support for the world's most successful electronic, semiconductor and systems companies. Established in 1981, the company reported revenues in the last fiscal year in excess of $1.15 billion. Corporate headquarters are located at 8005 S.W. Boeckman Road, Wilsonville, Oregon 97070-7777. World Wide Web site: http://www.mentor.com/.
Mentor Graphics, Mentor and Questa are registered trademarks of Mentor Graphics Corporation. All other company or product names are the registered trademarks or trademarks of their respective owners.
For more information, please contact:
Carole Dunn
Mentor Graphics
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