Palo Alto, CA, June 03, 2016 -- Defacto technologies ( www.defactotech.com), The System-on-Chip (SoC) Design integration company booth #1129

WHAT: Major semiconductor customers will be presenting how Defacto solutions are daily helping in different areas with a focus on RTL and Gate Level design restructuring:

SOCIONEXT *: Generating a Layout friendly RTL/Netlist by Defacto STAR

Major Semiconductor Customer **: A Cost-effective RTL Partitioning Methodology for Large SoC Designs

WHEN:

WHERE: Austin Convention Center in Austin, Texas; booth #1129

In addition Defacto will provides several demos :

(Austin TX time)

More information about Defacto can be found at: www.defactotech.com.

About Defacto Technologies

Defacto Technologies is a leading provider of Design solutions at both RTL and gate-level. Defacto solutions enable designers to achieve “Design closure at RTL by delivering a high quality suite of tools, which cover planning, analysis, insertion and debug needs. Defacto EDA tools STAR RTL DESIGN is a suite of silicon proven tools that are helping major semiconductor companies to increase predictability by strengthening Design quality at RTL. Defacto is headquartered at 155 Cours Berriat, Grenoble, 38028, Cedex 1, France. For more information, visit us at www.defactotech.com.