Beaverton, Ore., June 23, 2016 - Test Systems Strategies, Inc. (“TSSI”) today announced its latest installment of the enterprise strength design-to-test pattern conversion and validation tool suite, Solstice-TDS 2016.1.

The latest innovation in Solstice-TDS 2016.1 is the TimeTable module offering the state-of-the-art automatic cyclization technology to help design and test teams simplify the complex task of converting VCD/EVCD simulation files to a target ATE format.

“With the increase usage of high speed protocols in devices, vector translation tools that are without cognizant of device behaviors and the integration of various interface standards will produce incorrect test patterns.” Said Hau Lam, President and CEO at TSSI.  “No matter how fast a tool runs, the bottom line is the correct and quality output.”  Lam added.  “When a test pattern failed on the tester and test engineers have to spend precious engineering time to debug the pattern on the expensive tester, the so called ‘blind translation’ process is a proven bad investment even if the tool costs nothing to obtain.”

TSSI’s TimeTable is designed to analyze a large VCD/EVCD file within seconds to auto-detect appropriate device cycle for a target ATE.  Per-pin test format will also be auto-assigned while heuristically identify any potential test issues such as bus contention, tester rules violations, suboptimal usage of precious ATE time sets.  The upfront intelligent assist helps the TimeTable user avoid unnecessary problems and long device test time.

TimeTable beta customers have adopted this preventive methodology and avoid iterations of conversion passes; thereby, not needing additional burden in test program revision control.

TSSI Solstice-TDS 2016.1 is shipping now along with the latest 2016.1 TimeTable module.

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