Luncheon Panel: "Tackling SoC Integration Challenges"
Tuesday July 11, 2023
11:45am-1:00pm
Moscone West Room 3016
Accellera invites you to a luncheon and panel discussion focused on SoC integration challenges, with a focus on Clock Domain Crossing. Lu Dai, Accellera Chair, will also provide a brief update on Accellera.
Panel Abstract:
As SoC design becomes more widespread, the challenge of integration of design IP created and verified by tools from different suppliers becomes much more of an issue. To tackle these challenges, Accellera working groups have introduced new standardization initiatives such as the Security Annotation for Electronic Design Integration (SA-EDI) 1.0 Standard focused on helping IP providers identify security concerns, and the new Clock Domain Crossing (CDC) Working Group focused on creating a standard for CDC abstraction models to facilitate faster design IP integration.
The Accellera luncheon will begin with an update from Chair Lu Dai, followed by a panel focused on the efforts of the CDC Working Group to define a standard CDC collateral specification. The standard is aimed at easing SoC integration, enabling teams to integrate IPs verified using various CDC tools without sacrificing quality and design time. The 85 current members of the working group represent 20 companies, including a variety of users and tool vendors. Panel members from the working group will share the key work in progress and look toward deliverables in the coming year. There will be an opportunity for questions from attendees.
The Accellera-sponsored luncheon is free to DAC attendees, but registration is required.
Panelists:
Anupam Bakshi, founder and CEO, Agnisys
Frank Shirrmeister, vice president of solutions and business development at Arteris IP
Dammy Olopade, SPE Quality & Innovation, Intel Corporation, and Accellera CDC Working Group Chair
Ping Yeung, senior manager at Nvidia Corp
Moderator: Paul McClellan, Editor Breakfast Bytes
About Accellera
Accellera Systems Initiative is an independent, not-for-profit organization dedicated to create, support, promote, and advance system-level design, modeling, and verification standards for use by the worldwide electronics industry. The organization accelerates standards development and, as part of its ongoing partnership with the IEEE, its standards are contributed to the IEEE Standards Association for formal standardization and ongoing change control. For more information, please visit www.accellera.org. Find out more about membership. Follow @accellera on Twitter and LinkedIn or to comment, please use #accellera. Accellera Global Sponsors are Cadence, Siemens EDA, and Synopsys.
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Accellera and Accellera Systems Initiative are trademarks of Accellera Systems Initiative Inc. All other trademarks and trade names are the property of their respective owners.
Barbara Benjamin
HighPointe Communications
(503) 209-2323
www.hipcom.com
