“Imperas OVP modeling and high-level simulation platforms unify both hardware and software development for multi-core designs, and are clearly the wave of the future. Access to the University Program allows my student’s access to advanced technologies essential to their future endeavors” stated Professor Jong Tae Kim of Sungkyunkwan University (SKKU).
Professor Fernando Gehm Moraes at the Pontifical Catholic University of Rio Grande do Sul, (PUCRS) said “At PUCRS, we use Imperas virtual platforms in projects on multiprocessor SoC modeling, power evaluation, and programmability, as well as computer science graduate program courses on SoCs and research architecture. Our research group ( Grupo de Apoio ao Projeto de Hardware, or Hardware Design Support Group), also leverages these tools.
Recent projects, presentations and publications include:
- Friedrich Alexander University (FAU) Erlangen-Nuremberg, “Estimating Video Decoding Energies and Processing Times Utilizing Virtual Hardware.” Presented at DATE 2016.
- Karlsruhe Institute for Technology (KIT), "A Fast and Scalable Fault Injection Framework to Evaluate Multi/Many-core Soft Error Reliability."
- University Politecnica de Valencia, Project DREAMS from the European Union. See “ An Efficient Power Estimation Methodology for Complex RISC Processor-based Platforms.”
- University of Texas, Austin: see “System-on-a-Chip (SoC) Design” lectures and “Integration of Virtual platform Models into a System-level Design Framework” technical report.
- M. G. Mandelli, F. R. da Rosa, L. Ost, G. Sassatelli and F. G. Moraes, "Multi-level MPSoC modeling for reducing software development cycle," Electronics, Circuits, and Systems (ICECS), 2013 IEEE 20th International Conference on, Abu Dhabi, 2013.
- F. Rosa, L. Ost, T. Raupp, F. Moraes and R. Reis, "Fast energy evaluation of embedded applications for many-core systems," Power and Timing Modeling, Optimization and Simulation (PATMOS), 2014 24th International Workshop on, Palma de Mallorca, 2014.
- G. Madalozzo, M. Mandelli, L. Ost and F. G. Moraes, "A platform-based design framework to boost many-core software development," 2015 IEEE International Conference on Electronics, Circuits, and Systems (ICECS), Cairo, 2015.
- M. Mandelli, L. Ost, G. Sassatelli and F. Moraes, "Trading-off system load and communication in mapping heuristics for improving NoC-based MPSoCs reliability," Sixteenth International Symposium on Quality Electronic Design (ISQED), Santa Clara, CA, 2015.
"Virtual platforms are critical to meet the challenges of increasing software complexity, and security, that today’s students will face,” said Duncan Graham, university program manager for Imperas. "Imperas is investing in the next generation of innovators, who will help revolutionize embedded software development.”
Over 7,000 students and academics from over 1,000 university departments currently subscribe to the Open Virtual Platforms website, which features freely available processor core models and OVP-based virtual platforms. These models work with the Imperas and OVP simulators, including the QuantumLeap parallel simulation accelerator with performance of over ten billion instructions per second.
For more information on the Imperas University Program, please email univ@imperas.com.
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