Physical layer and protocols provide complete MIPI® IP solution for SoC development
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Physical layer and protocols provide complete MIPI® IP solution for SoC development

Intellectual property supports rapid implementation of MIPI-compliant designs for mobile phones and associated devices

Düsseldorf, Germany, — August 06, 2009 —
The latest intellectual property (IP) from Toshiba Electronics Europe’s ASIC & Foundry Business Unit will simplify and speed the implementation of MIPI®-compliant system-on-chip (SoC) designs for mobile phones and associated devices. The Toshiba MIPI (Mobile Industry Processor Interface) offering comprises a physical layer and protocols that build on this layer to support the rapid development of complete MIPI-compliant transmit and receive solutions. Full details of the new IP, which is fully proven for Toshiba’s semiconductor processes, can be found at http://www.toshiba-components.com/ASIC/MIPI.html.

Toshiba’s MIPI D-PHY is a bi-directional, low-power, high-speed physical layer to which various protocols can be added dependant on application requirements. At present MIPIcompliant protocols from Toshiba include CSI-2 (Camera Serial Interface 2), DSI (Display Serial Interface) and UniProSM (Unified Protocol).

Compliant with the MIPI D-PHY version 0.92 specification, Toshiba’s MIPI D-PHY provides a re-usable physical layer with support for one to four data channels and a single clock channel. The same D-PHY can be used to for high-speed serial communications in high speed (HS) mode and with single-ended transmission lines in low power (LP) mode. In HS mode the MIPI D-PHY can deliver speeds up to 1Gbps (depending on technology and implementation) through an advanced, scalable source-synchronous, differential SLVS transceiver. In low power (LP) mode the D-PHY provides single-ended transmission at speeds to 10Mbps.

Toshiba’s CSI-2 protocol provides the basis for low-pin-count interfaces between camera modules and, for example, the system host. Data rates as high as 4Gbps enable new camera features and support sensor resolutions beyond 10Mpixel. The Toshiba DSI is a higher layer protocol with error correction that supports solutions for display-related data communication. DSI supports both ‘smart’ (buffered) and ‘video mode’ (unbuffered) display panels. UniPro 1.0/1.1 is PHY-independent and provides a single, unified reliable protocol that can be used across several applications including cameras, displays and device communication interfaces. UniPro offers high-speed communications, error correction for reliability and low energy per transferred bit.

The new MIPI-compliant IP supports the requirements for low-power, low noise generation and high noise immunity demanded by mobile phones. The D-PHY is based on 1.2V supplies and, depending on the application, operational power and standby power are in the mW and μW range respectively.

Additional IP for MIPI-based designs includes optional PLL, lane control and interface logic. Toshiba will continue to develop solutions for future MIPI protocols as they become available.

The MIPI D-PHY will scale across existing and future semiconductor process technologies and Toshiba’s MIPI solutions have already been fully silicon-proven in the company’s own application specific standard products (ASSPs). Based on its advanced 90nm, 65nm and 40nm CMOS ASIC technologies, Toshiba MIPI-compliant ASSPs include devices for display sub-systems as well as camera applications.

Designers at Toshiba’s European LSI Design and Engineering Center (ELDEC) are available to provide full technical support, advice and guidance relating to the deployment of SoCs incorporating MIPI functionality.

For more information on Toshiba’s ASIC & Foundry services, including the company’s full range of IP technologies, please visit: www.toshiba-components.com/ASIC.

About Toshiba

Toshiba Electronics Europe (TEE) is the European Headquarters for the electronic components business of Toshiba Corporation, which is the world's fourth largest semiconductor vendor according to estimates by Dataquest.

Providing design, manufacturing, marketing and sales, TEE was formed in 1973 in Neuss, Germany. The company now has headquarters in Düsseldorf, Germany and subsidiaries in France, Italy, Spain, Sweden and the United Kingdom. Company president is Mr. Hitoshi Otsuka and the total number of personnel in Europe is around 400.

Toshiba Electronics Europe offers one of the industry's broadest IC and discrete product lines including high-end memory, microcontrollers, ASICs, ASSPs and display products for automotive, multimedia, consumer, telecoms and networking applications. The company also has a wide range of power semiconductor solutions.

Toshiba Corporation is a leader in information and communications systems, electronic components, consumer products and power systems. The company’s integration of these wide-ranging capabilities assures its position as an innovator in advanced components, products and systems. Toshiba operates a global network of more than 740 companies, with 198,000 employees worldwide and annual sales surpassing US$76 billion.

For more company information visit Toshiba's web site at www.toshiba-components.com

About the MIPI® Alliance

The Mobile Industry Processor Interface (MIPI®) Alliance is an open membership organization that includes leading companies in the mobile industry that share the objective of defining and promoting open specifications for interfaces in mobile terminals. MIPI Specifications establish standards for hardware and software interfaces typically found in mobile terminal systems. By defining such standards and encouraging their adoption throughout the industry value chain, the MIPI Alliance intends to reduce fragmentation and improve interoperability among system components, benefiting the entire mobile industry.




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