MCADCafe: ASICs .. the Book

A.3 BNF Index

Table A.1 is an index to the VHDL BNF productions. For example, to find the legal positions for a process statement you would locate production rules 21 and 32 opposite process_statement in Table A.1 . These rule numbers correspond to the productions for concurrent_statement ( 21 ) and entity_declaration ( 32 ). Next, turning to rule 32 for entity_declaration , you will find that only a passive _process_statement is allowed in an entity declaration. Table A.2 is a list of VHDL keywords and an index to rules that reference a keyword.

TABLE A.2 VHDL keywords and index (list of rules that reference a keyword). 1

abs 37

access 87

after 29 , 94

alias 3

all 18 , 24 , 77 , 85

and 36

architecture 4 , 31

array 87

assert 5

attribute 7 , 9

begin 4 , 15 , 32 , 41 , 66 , 81

block 15

body 59

buffer 49

bus 49 , 76

case 16

component 19 , 20 , 31

configuration 18 , 20 , 23 , 24 , 31

constant 25 , 31 , 49

disconnect 29

downto 67

else 22 , 46

elsif 46

end 4 , 13 , 15 , 16 , 18 , 19 , 23 , 32 , 41 , 46 , 55 , 59 , 60 , 62 , 66 , 69 , 81

entity 18 , 20 , 24 , 31 , 32

exit 35

file 31 , 38 , 87

for 13 , 18 , 24 , 41 , 55 , 92

function 31 , 81 , 82

generate 41

generic 15 , 18 , 19 , 20 , 24 , 32

group 31 , 43 , 44

guarded 22 , 73

if 41 , 46

impure 82

in 2 41 , 49 , 55

inertial 22 , 73 , 75

inout 49

is 3 , 4 , 9 , 15 , 16 , 19 , 23 , 32 , 38 , 44 , 59 , 60 , 66 , 81 , 83 , 87

label 31

library 52

linkage 49

literal 31

loop 55

map 15 , 18 , 20 , 24

mod 86

nand 36

new 64

next 57

nor 36

not 37

null 54 , 58 , 94

of 4 , 9 , 23 , 87

on 92

open 1 , 18 , 24 , 38

or 36

others 17 , 18 , 24 , 33 , 77

out 3 49

package 31 , 59 , 60

port 15 , 18 , 19 , 20 , 24 , 32

postponed 21 , 32 , 66

procedure 31 , 81 , 82

process 66

pure 82

range 68

record 69

reject 22 , 73 , 75

rem 86

report 5 , 71

return 72 , 78 , 82

rol 70

ror 70

select 73

severity 5 , 71

signal 31 , 49 , 76

shared 91

sla 70

sll 70

sra 70

srl 70

subtype 31 , 83

then 46

to 67

transport 22 , 73 , 75

type 31 , 87

unaffected 93

units 31 , 62

until 92

use 13 , 18 , 23 , 24 , 89

variable 31 , 49 , 91

wait 92

when 16 , 22 , 35 , 57 , 73

while 55

with 73

xnor 36

xor 36

1. Underlines denote VHDL-93 keywords that are not VHDL-87 keywords.

2. Excluding VHDL-87 file_declaration .

3. Excluding VHDL-87 file_declaration .