Availability and Pricing
SiWare Memory compilers and SiWare Logic libraries are available now for early adopters of TSMC’s 40G and 40LP processes. Early partners already have internally qualified SiWare IP in silicon. Virage Logic’s qualification process, based on advanced test chip methodologies, is in progress and will be finalized as early as July 2008. Project pricing starts at $100,000.
TSMC’s Power Trim Service is available exclusively from TSMC for TSMC advanced process technologies.
About Virage Logic
Founded in 1996, Virage Logic Corporation rapidly established itself as a technology and market leader in providing advanced embedded memory intellectual property (IP) for the design of complex integrated circuits. The company’s Silicon Aware IP™ offering (embedded memories, logic libraries and I/Os) includes silicon behavior knowledge for increased predictability and manufacturability. Through its acquisition of Ingot Systems in 2007, the company expanded its product offering to include Application Specific IP (ASIP) solutions such as Double Data Rate (DDR) Memory Controllers and design services. The highly differentiated product portfolio provides higher performance, lower power, higher density and optimal yield to foundries, integrated device manufacturers (IDMs) and fabless customers. The company uses its FirstPass-Silicon Characterization Lab™ for certain products to help ensure high quality, reliable IP across a wide range of foundries and process technologies. For more information, visit www.viragelogic.com.
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Contact:
Virage Logic Corporation
Sabina Burns, 510-743-8115
Email Contact
or
McClenahan
Bruer Communications
James McIntyre, 503-546-1016
Email Contact
